Parallelization of a quantum-classic hybrid model for Nanoscale Semiconductor devices
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| Autores: | , , , , |
|---|---|
| 格式: | artículo original |
| 狀態: | Versión publicada |
| Fecha de Publicación: | 2011 |
| 實物特徵: | The expensive reengineering of the sequential software and the difficult parallel programming are two of the many technical and economic obstacles to the wide use of HPC. We investigate the chance to improve in a rapid way the performance of a numerical serial code for the simulation of the transport of a charged carriers in a Double-Gate MOSFET. We introduce the Drift-Diffusion-Schrödinger-Poisson (DDSP) model and we study a rapid parallelization strategy of the numerical procedure on shared memory architectures. |
| País: | Portal de Revistas UCR |
| 機構: | Universidad de Costa Rica |
| Repositorio: | Portal de Revistas UCR |
| 語言: | Inglés |
| OAI Identifier: | oai:portal.ucr.ac.cr:article/2096 |
| 在線閱讀: | https://revistas.ucr.ac.cr/index.php/matematica/article/view/2096 |
| Palabra clave: | Parallelization Shared memory paradigm Schrödinger equation Drift-Difusion system Subband model Nanotransistor Paralelezación Paradigma de Memoria Compartida Ecuación de Schrödinger Sistemas Drift-Difusion Modelo Subband Nanotubos |