Comparison of spin-qubit architectures for quantum error-correcting codes
保存先:
| 著者: | , , , |
|---|---|
| フォーマット: | artículo preliminar |
| 出版日付: | 2025 |
| その他の書誌記述: | We investigate the performance of two quantum error-correcting codes, the surface code and the Bacon-Shor code, for implementation with spin qubits in silicon. In each case, we construct a logical qubit using a planar array of quantum dots, exploring two encoding schemes: one based solely on single-electron Zeeman qubits (Loss-DiVincenzo qubits), and a hybrid approach combining Zeeman and singlet-triplet qubits. For both codes, we evaluate key performance metrics, including logical state preparation fidelity and cycle-level error correction performance, using state-of-the-art experimental parameters. Our results show that the hybrid encoding consistently outperforms the pure Zeeman-qubit implementation. By identifying the dominant error mechanisms that limit quantum error correction performance, our study highlights concrete targets for improving spin qubit hardware and provides a path toward scalable fault-tolerant architectures. In particular, we find that the logical error rate is not limited by memory errors, but rather by gate errors, especially 1- and 2-qubit gate errors. |
| 国: | Kérwá |
| 機関: | Universidad de Costa Rica |
| Repositorio: | Kérwá |
| 言語: | Inglés |
| OAI Identifier: | oai:kerwa.ucr.ac.cr:10669/104458 |
| オンライン･アクセス: | https://hdl.handle.net/10669/104458 https://doi.org/10.48550/arXiv.2506.17190 |
| キーワード: | Error-correcting codes Spin qubits Monte Carlo sampling Quantum computing Quantum physics Hybrid encoding |