A Single Memristorbased TTL NOT logic
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| 著者: | , , , , |
|---|---|
| フォーマット: | artículo original |
| 状態: | Versión publicada |
| 出版日付: | 2023 |
| その他の書誌記述: | This article presents a NOT logic gate circuit based on a single memristor, and analyzes it for different biological memristive samples based on extracted resistances. The simple resistorvoltage representation of the memristor in the logic circuit is used to formulate a methodology to tune the parameters of the circuit in accordance with TTL voltage values. The logic circuit consists of two resistors in series with the memristor. The input is connected to one end of the memristor, and the output is drawn across the series connection of the second resistor, and the memristor. The methodology comprises of two steps, where, in the first step, the logic ‘low’ TTLinput voltages are examined, and in the second step, the circuit is evaluated for logic ‘high’ TTLinput voltages. The methodology reveals that there is a mínimum voltage value of ‘high’ TTL-input beyond which the output does not fall within the logic ‘low’ TTL-output. The proposed technique may be extended to evaluate novel memristive materials for single memristor-based NOT logic. |
| 国: | Portal de Revistas TEC |
| 機関: | Instituto Tecnológico de Costa Rica |
| Repositorio: | Portal de Revistas TEC |
| 言語: | Inglés |
| OAI Identifier: | oai:ojs.pkp.sfu.ca:article/6771 |
| オンライン･アクセス: | https://revistas.tec.ac.cr/index.php/tec_marcha/article/view/6771 |
| キーワード: | Memristor NOT logic TTL hysteresis green electronics biodegradable electronics memristor NO lógica histéresis electrónica verde electrónica biodegradable |