Design and implementation of an all-digital timing recovery system for asynchronous communication
সংরক্ষণ করুন:
| লেখক: | , |
|---|---|
| বিন্যাস: | artículo original |
| বর্তমান অবস্থা: | Versión publicada |
| প্রকাশনার তারিখ: | 2015 |
| বিবরন: | This work addresses the design and implementation of a timing recovery unit for a communication system with parallel reception, 4-PAM modulation, raised cosine filtering and a nominal sampling frequency of 1,1 GHz. The design of the building blocks within the system, as well as simulation results and the physical implementation in FPGA are discussed. |
| দেশ: | Portal de Revistas TEC |
| প্রতিষ্ঠান: | Instituto Tecnológico de Costa Rica |
| Repositorio: | Portal de Revistas TEC |
| ভাষা: | Español |
| OAI Identifier: | oai:ojs.pkp.sfu.ca:article/2332 |
| অনলাইন ব্যবহার করুন: | https://revistas.tec.ac.cr/index.php/tec_marcha/article/view/2332 |
| মুখ্য শব্দ: | 4-PAM modulation communication systems digital signal processing timing recovery. Modulación 4-PAM procesamiento digital de señales recuperación de la temporización sistema de comunicación. |