Alvarado-Rivera, G., Fonseca-Huapaya, A. R., & Arias-Esquivel, Y. (2025). Design of a mitigation circuit to improve MOSFET switching in a half-bridge configuration.
Dyfyniad Arddull ChicagoAlvarado-Rivera, Giancarlo, Ana Rebeca Fonseca-Huapaya, y Yeiner Arias-Esquivel. Design of a Mitigation Circuit to Improve MOSFET Switching in a Half-bridge Configuration. 2025.
Dyfyniad MLAAlvarado-Rivera, Giancarlo, Ana Rebeca Fonseca-Huapaya, y Yeiner Arias-Esquivel. Design of a Mitigation Circuit to Improve MOSFET Switching in a Half-bridge Configuration. 2025.
Rhybudd: Mae'n bosib nad yw'r dyfyniadau hyn bob amser yn 100% cywir.