Fast delayed signal cancellation based PLL for unbalanced grid conditions
Guardado en:
| Autores: | , , , , , |
|---|---|
| Formato: | comunicación de congreso |
| Fecha de Publicación: | 2019 |
| Descripción: | Frequency identification is one of the most critical issues for grid-connected power converters, especially when the grid is unbalanced or distorted. Therefore, this paper proposes a novel frequency estimator with fast convergence for balance and unbalanced grid-voltage faults. The proposed algorithm is based on a Phase Locked Loop (PLL), enhanced with a fast positive and negative sequence detector. Delayed Signal Cancellation methodology with fast convergence is investigated under single-phase and two-phase voltage dip. The effectiveness of the proposed PLL is validated using simulations and experimental results. |
| País: | Kérwá |
| Institución: | Universidad de Costa Rica |
| Repositorio: | Kérwá |
| Lenguaje: | Inglés |
| OAI Identifier: | oai:kerwa.ucr.ac.cr:10669/100086 |
| Acceso en línea: | https://hdl.handle.net/10669/100086 https://doi.org/10.1109/ICA-ACCA.2018.8609741 |
| Palabra clave: | Phase Locked Loop Double Synchronous Reference Frame Double Second Order Generalized Integrator Delayed Signal Cancellation Delays Voltage fluctuations Frequency estimation Voltage control Time-frequency analysis Frequency control |