Design and implementation of an all-digital timing recovery system for asynchronous communication
Guardado en:
| Autores: | , |
|---|---|
| Formato: | artículo original |
| Fecha de Publicación: | 2015 |
| Descripción: | This work addresses the design and implementation of a timing recovery unit for a communication system with parallel reception, 4-PAM modulation, raised cosine filtering and a nominal sampling frequency of 1,1 GHz. The design of the building blocks within the system, as well as simulation results and the physical implementation in FPGA are discussed. |
| País: | RepositorioTEC |
| Institución: | Instituto Tecnológico de Costa Rica |
| Repositorio: | RepositorioTEC |
| Lenguaje: | Español |
| OAI Identifier: | oai:repositoriotec.tec.ac.cr:2238/8735 |
| Acceso en línea: | https://revistas.tec.ac.cr/index.php/tec_marcha/article/view/2332 https://hdl.handle.net/2238/8735 |
| Palabra clave: | 4-PAM modulation; communication systems; digital signal processing; timing recovery. Modulación 4-PAM; procesamiento digital de señales; recuperación de la temporización; sistema de comunicación. |